Method for identifying the performance bounds of a transmit-receive module
Inventors
Allen, Jeffery C. • Arceo, Diana • Rockway, John W.
Assignees
Publication Number
US-9971668-B1
Publication Date
2018-05-15
Expiration Date
2033-05-15
Interested in licensing this patent?
MTEC can help explore whether this patent might be available for licensing for your application.
Abstract
A method for identifying performance bounds of a transmit-receive (T/R) module over a bandwidth ƒb when connected to an antenna, a transmitter, and a receiver all with known reflectance within the bandwidth ƒb; measuring a raw T/R module point representing isolation and insertion loss of the T/R module when connected to the antenna, the transmitter, and the receiver without a matching circuit; plotting the raw T/R module point on a performance image graph; using a mathematical representation of a multiport matching circuit that contains no gyrators and comprises a fixed number of capacitors and inductors to approximate a Pareto front comprised of a plurality of Pareto points; and connecting each Pareto point to the raw T/R module point on the performance image graph such that the performance image becomes a visual representation of the performance bounds of a class of multiport matching circuits having capacitors and inductors.
Core Innovation
The invention provides a method for identifying performance bounds of a transmit-receive (T/R) module over a bandwidth ƒb by connecting the T/R module to an antenna, transmitter, and receiver, all with known reflectance within the bandwidth. The method involves measuring isolation between the transmitter and receiver, insertion losses from transmitter to antenna and from antenna to receiver without a matching circuit, and plotting these metrics as a raw T/R module point on a performance image graph. A mathematical representation of a multiport matching circuit containing a fixed number of capacitors and inductors but no gyrators is used to approximate a Pareto front comprising multiple Pareto points. Connecting each Pareto point to the raw T/R module point on the graph results in a visual representation of the performance bounds of the class of multiport matching circuits.
The problem addressed arises from the practical limitations of T/R modules, such as circulators and ferrite pucks, which cannot ideally provide complete transmitter-receiver isolation and prevent insertion loss simultaneously. Consequently, designing or improving matching circuits to achieve desired performance tradeoffs requires extensive experiments and trial-and-error in the prior art. The invention solves this by offering a method to graphically identify the best possible isolation and insertion loss tradeoffs for given T/R modules and associated components, guiding engineers to design optimized matching circuits to meet predefined performance criteria without exhaustive experimental procedures.
The method further parameterizes multiport matching circuits through generating submanifolds of orthogonal scattering matrices and sweeping over them to identify isolation and insertion loss data for Pareto optimal solutions. Utilizing lumped, lossless, gyrator-free multiport matching circuits comprising a fixed number of capacitors and inductors enables simultaneous optimization of insertion loss and isolation objective functions. The invention provides a systematic and computational approach to determine performance bounds and design directions for improved T/R module functionality.
Claims Coverage
The patent contains three independent claims presenting a method for identifying performance bounds of a T/R module. These claims detail the systematic approach, mathematical modeling, and optimization techniques central to the invention.
Method for performance bound identification of a T/R module using raw measurements and Pareto front approximation
Providing an antenna, transmitter, and receiver with known reflectance; measuring isolation and insertion loss without a matching circuit; plotting these as a raw T/R module point; mathematically representing a multiport matching circuit with no gyrators and fixed numbers of capacitors and inductors; approximating a Pareto front of performance tradeoffs; connecting Pareto points to the raw T/R module point on the graph to produce a visual performance image; identifying the best insertion loss and isolation achievable; designing and connecting an optimized matching circuit from the class to meet performance criteria.
Method for parameterizing multiport matching circuits via submanifolds of orthogonal scattering matrices and sweeping to find Pareto points
Providing the T/R module and components with known reflectance; generating M submanifolds of orthogonal scattering matrices for a multiport matching circuit without gyrators and with fixed capacitors and inductors; sweeping over these submanifolds to identify isolation and insertion loss at multiple Pareto points; displaying the Pareto front on a performance image showing tradeoffs; identifying best achievable performance; selecting an optimized matching circuit; and connecting it to the T/R system.
Method for mathematically representing lumped, lossless, gyrator-free multiport matching circuits to solve joint insertion loss and isolation objectives
Providing the T/R module, antenna, transmitter, and receiver with known operational characteristics; representing a class of lumped, lossless, gyrator-free multiport matching circuits mathematically; exploiting this representation to solve insertion loss and isolation objective functions; generating a performance image with a Pareto front of optimal tradeoffs; identifying best achievable performance; designing an optimized matching circuit accordingly; and connecting it to the T/R system.
The independent claims collectively cover a method for empirically and mathematically characterizing the performance bounds of a T/R module with associated components, employing lossless, gyrator-free multiport matching circuits containing fixed capacitors and inductors, using Pareto optimization techniques to produce performance images that guide the design and selection of optimized matching circuits to meet performance goals.
Stated Advantages
The method provides a visual graphical representation of performance bounds, enabling engineers to assess isolation and insertion loss tradeoffs effectively.
It allows determination of whether existing matching circuits can be improved or new circuits designed to meet predefined performance criteria without extensive trial-and-error.
The approach handles complete classes of multiport matching circuits with fixed components, encompassing all topologies and enabling comprehensive performance benchmarking.
It guides multiport matching circuit design, such as multiport ladder designs, by directing design parameters like minimum number of stages for desired performance.
Documented Applications
Design, analysis, and performance optimization of transmit-receive modules, especially circulators and ferrite pucks, connected to antennas, transmitters, and receivers over specified bandwidths.
Graphically evaluating and selecting multiport matching circuits to improve isolation and insertion loss tradeoffs in T/R modules.
Benchmarking practical engineering multiport matching circuits such as multiport ladders by comparison to computed performance bounds.
Determining the viability of meeting predefined performance criteria with given T/R components before circuit fabrication or experimental testing.
Interested in licensing this patent?