Chemically-sensitive field effect transistors, systems and methods for manufacturing and using the same
Inventors
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Assignees
MemberParagrafParagrafParagraf specializes in the development and manufacture of wafer-scale, silicon-compatible graphene electronic devices and sensors. Utilizing a proprietary process for direct, contamination-free graphene synthesis, the company delivers scalable solutions for magnetic field sensing, molecular and biosensing, and advanced electronics integration. These technologies address challenges in cryogenics, quantum computing, automotive, aerospace, environmental monitoring, and healthcare. With a focus on large-scale integration of 2D materials, Paragraf advances next-generation sensors and components for demanding and extreme environments.
Paragraf specializes in the development and manufacture of wafer-scale, silicon-compatible graphene electronic devices and sensors. Utilizing a proprietary process for direct, contamination-free graphene synthesis, the company delivers scalable solutions for magnetic field sensing, molecular and biosensing, and advanced electronics integration. These technologies address challenges in cryogenics, quantum computing, automotive, aerospace, environmental monitoring, and healthcare. With a focus on large-scale integration of 2D materials, Paragraf advances next-generation sensors and components for demanding and extreme environments.
Publication Number
US-9857328-B2
Publication Date
2018-01-02
Expiration Date
Abstract
This invention concerns chemically-sensitive field effect transistors (FETs) are preferably fabricated using semiconductor fabrication methods on a semiconductor wafer, and in preferred embodiments, on top of an integrated circuit structure made using semiconductor fabrication methods. The instant chemically-sensitive FETs typically comprise a conductive source, a conductive drain, and a channel composed of a one-dimensional (1D) or two-dimensional (2D) transistor material, which channel extends from the source to the drain and is fabricated using semiconductor fabrication techniques on top of a wafer. Such chemically-sensitive FETs, preferably configured in independently addressable arrays, may be employed to detect a presence and/or concentration changes of various analyte types in chemical and/or biological samples, including nucleic acid hybridization and/or sequencing reactions.
Core Innovation
The invention is a class of chemically-sensitive field effect transistors (FETs) preferably fabricated using semiconductor fabrication methods on a semiconductor wafer and, in preferred embodiments, on top of an integrated circuit structure. The chemically-sensitive FETs typically comprise a conductive source, a conductive drain, and a channel composed of a one-dimensional (1D) or two-dimensional (2D) and/or three-dimensional (3D) transistor material that extends from the source to the drain, and the devices may be configured in independently addressable arrays to detect presence and/or concentration changes of various analyte types, including nucleic acid hybridization and sequencing reactions.
The patent addresses limitations of conventional ISFET/MOSFET approaches for chemical and biological analysis, specifically lack of sensor sensitivity and unfavorable signal-to-noise as transistor nodes scale down and the need for FETs that remain robust against short-channel effects while enabling shorter gates and higher sensitivity. The disclosure proposes use of very thin channel materials (1D/2D/3D layers), optimized channel W/L ratios, solution-gated well structures, and integration with CMOS processing to increase sensor sensitivity, enable smaller sensors and dense arrays, and support DNA hybridization and sequencing and related diagnostics.
Claims Coverage
Three independent claims were identified. Main inventive features extracted from each independent claim are listed below.
Multi-layered structure with insulating layers and embedded electrodes
A multi-layered FET structure comprising a substrate layer, a first insulating layer with source and drain electrodes disposed within it, and a second insulating layer positioned above the first insulating layer.
Graphene layer positioned between the first and second insulating layers
A graphene layer positioned between the first and second insulating layers and extending between the outer side portions of the source and drain electrodes, contacting the top surface of the source and drain electrodes to form a channel.
Well structure in the second insulating layer exposing the graphene channel
A well structure provided in the second insulating layer having a chamber that extends from the top surface to the bottom surface and exposes the graphene layer within the chamber, with the graphene layer forming the bottom surface of the chamber.
Source and drain positioned in the first insulating layer separated by a channel
Source and drain electrodes positioned in the first insulating layer, separated from one another by a channel, with a one-dimensional or two-dimensional transistor material layer positioned between the first and second insulating layers extending between the electrodes to form the channel.
Well structure exposing the 1D or 2D transistor material within a chamber
A well structure provided in the second insulating layer having a bottom surface positioned above and in contact with the one-dimensional or two-dimensional transistor material layer and a chamber extending from the top surface to the bottom surface to expose the transistor material within the chamber.
Well opening defined by opposed side portions and bottom formed by the 1D/2D layer
A well structure in the second insulating layer having an opening defined by opposed side portions and a bottom formed by the one-dimensional or two-dimensional transistor material layer, the opening exposing the transistor material layer within the chamber.
The independent claims focus on (1) a multi-layered FET architecture with source and drain electrodes embedded in an insulating layer, (2) placement of a 1D/2D transistor material (specifically graphene in claim 1) between insulating layers to form a channel contacting electrodes, and (3) a well/chamber in an upper insulating layer that exposes the transistor material and makes the transistor chemically sensitive.
Stated Advantages
Increased measurement sensitivity and accuracy compared to conventional ISFET/MOSFET approaches.
Ability to fabricate significantly smaller sensors and denser sensor arrays.
Improved signal-to-noise characteristics and robustness against short-channel effects using thin 1D/2D/3D channel materials.
Compatibility with semiconductor/CMSO fabrication methods enabling potential mass production, lower cost, and portability.
Rapid data acquisition from small sensors to large, dense arrays facilitating high-throughput analysis.
Documented Applications
Nucleic acid hybridization and sequencing reactions, including use in Next Generation Sequencing (NGS) workflows.
Genetic diagnostics, genome identification, species identification, and nucleic acid capture.
Whole genome analysis, genome typing analysis, microarray analysis, panel analysis, exome analysis, microbial/microbiome analysis, and genotyping analysis.
Clinical analyses including cancer analysis, non-invasive prenatal testing (NIPT) analysis, cell-free DNA (cfDNA) analysis, and blood/plasma/serum analysis.
pH and ion sensing and other chemical and biological analyte detection in biosensor applications.
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