SpaceCube V2.0 micro single board computer

Inventors

Petrick, David J.Geist, AlessandroLin, Michael R.Crum, Gary R.

Assignees

National Aeronautics and Space Administration NASA

Publication Number

US-9851763-B1

Publication Date

2017-12-26

Expiration Date

2033-09-30

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Abstract

A single board computer system radiation hardened for space flight includes a printed circuit board having a top side and bottom side; a reconfigurable field programmable gate array (FPGA) processor device disposed on the top side; a connector disposed on the top side; a plurality of peripheral components mounted on the bottom side; and wherein a size of the single board computer system is not greater than approximately 7 cm×7 cm.

Core Innovation

The invention is a single board computer system that is radiation hardened for space flight applications. It includes a printed circuit board (PCB) with a top side and bottom side, wherein a reconfigurable field programmable gate array (FPGA) processor device and a connector are disposed on the top side, and a plurality of peripheral components are mounted on the bottom side. The size of the system is approximately 7 cm by 7 cm, and the PCB comprises multiple layers arranged symmetrically about a central plane in a two-halves configuration. The layout stack-up includes fourteen layers: four ground layers, four power layers, four signal layers, a top layer, and a bottom layer.

The background identifies a need for next-generation onboard processing capabilities for space missions using advanced instruments such as laser altimeter, radar, and hyperspectral devices. Existing processing systems lack sufficient power and reconfigurability to meet mission objectives that demand real-time data product generation, sensor collaboration, and onboard data reduction. Moreover, integrating high pin-count FPGA devices demands a dense interconnect and compact packaging, complicated by stringent space flight standards like the IPC 6012B Class 3/A PCB quality standard and strict size and weight constraints.

The invention addresses these challenges via a unique PCB layout strategy utilizing a back-to-back mounting of high pin-count FPGA devices on opposite sides of the PCB, employing blind vias and through-hole vias to manage signal escape and maintain quality standards. The design enables use of large CGA devices with 1752 pins in a minimal PCB footprint, while managing power, signal integrity, thermal dissipation, and radiation mitigation. The system optimizes component placement, connector type, and power regulation to achieve a low-power, high-performance single board computer suitable for spaceflight with a compact form factor.

Claims Coverage

The claims disclose six main inventive features related to the architecture and layout of a single board computer system and its printed circuit board arrangement, suitable for radiation hardened space flight applications.

Symmetrical multilayer printed circuit board layout in two-halves configuration

The printed circuit board (PCB) has a plurality of layers arranged symmetrically above and below a central plane forming a two-halves configuration, enhancing signal routing and meeting strict quality standards for space flight.

Integration of a radiation hardened FPGA and peripheral components with compact packaging

A field programmable gate array (FPGA) processor device and a connector are disposed on the top side of the PCB, with multiple peripheral components mounted on the bottom side, all within a size not greater than approximately 7 cm by 7 cm.

Fourteen-layer PCB stack-up including dedicated ground, power, and signal layers

The layout stack-up of the PCB includes fourteen layers: four ground layers, four power layers, four signal layers, a top layer, and a bottom layer, arranged to maximize performance, reduce interference, and support high-density interconnections.

Use of blind vias and through-hole vias for signal breakout and component interconnection

Employment of a plurality of blind vias and through-hole vias to connect similarly located pins in back-to-back arrangements of column grid array (CGA) devices, optimizing signal breakout and PCB real estate usage.

Power layer positioning adjacent to either the center or the top/bottom layers depending on design

Power layers are positioned in the PCB stack-up either near the center plane or adjacent to top and bottom layers to improve power integrity while avoiding split planes.

Component placement strategy to localize through-hole vias under peripheral components

Peripheral components on the bottom side are positioned to localize through-hole vias connecting the FPGA to signal layers beneath these components to reduce PCB complexity and maintain compactness.

Together, these inventive features enable a compact, radiation hardened, and reconfigurable single board computer system with a multilayer PCB designed for high processing capability and stringent space flight environmental requirements.

Stated Advantages

Provides one to two orders of magnitude improvements in onboard computing power while lowering relative power consumption and cost.

Enables a highly compact form factor with a size not greater than approximately 7 cm×7 cm, suitable for strict size and weight constraints in space applications.

Supports radiation mitigation techniques including self-scrubbing FPGA configurations and redundant storage to protect against radiation upsets.

Allows high pin-count FPGA devices to be mounted in a back-to-back arrangement, maximizing processing capability while maintaining quality standards.

Reduces power requirements by integrating switching regulators and linear regulators on the single board computer itself.

Documented Applications

CubeSat miniaturized satellite platforms requiring small size, low power, and high data processing capabilities.

Small free-flyer satellite systems.

Balloons and sounding rockets.

Unmanned aerial vehicles (UAVs).

Small instruments that require high-end data processing capabilities.

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