Printed circuit board assembly for use in space missions
Inventors
Petrick, David J. • Vo, Luan • Albaijes, Dennis
Assignees
National Aeronautics and Space Administration NASA
Publication Number
US-9549467-B1
Publication Date
2017-01-17
Expiration Date
2033-09-30
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Abstract
An electronic assembly for use in space missions that includes a PCB and one or more multi-pin CGA devices coupled to the PCB. The PCB has one or more via-in-pad features and each via-in-pad feature comprises a land pad configured to couple a pin of the one or more multi-pin CGA devices to the via. The PCB also includes a plurality of layers arranged symmetrically in a two-halves configuration above and below a central plane of the PCB.
Core Innovation
The invention relates to an electronic assembly and printed circuit board (PCB) design for use in space missions that overcomes difficulties in mounting high pin count column grid array (CGA) devices on PCBs meeting stringent space flight quality standards such as IPC 6012B Class 3/A. It addresses the problem of increasing processing power requirements in space missions that require advanced on-board processing using large CGA devices with dense pin arrays mounted on both sides of a PCB. The invention provides a novel PCB with a via-in-pad feature and layers arranged symmetrically in a two-halves configuration to support back-to-back CGA device mounting while maintaining quality standards.
The problem solved is the inability of conventional PCB design techniques, including standard via breakouts and connector mounting methods, to meet stringent Class 3/A quality standards when using high-density CGA devices (e.g., 1752-pin CGAs with 1 mm pitch) in a back-to-back arrangement. Existing designs fail due to the constraints imposed by via sizes, board thickness, pad dimensions, and power integrity requirements, making routing and signal breakout impractical. The novel design employs blind via-in-pad features to allow smaller drill sizes, symmetrical layer structures for improved power and signal integrity, and modified back-to-back connector mounting to increase interconnect density and mechanical reliability.
Claims Coverage
The patent claims cover two main independent inventions focusing on an electronic assembly incorporating multi-pin CGA devices and a PCB structure supporting these devices.
Multi-pin CGA device assembly with via-in-pad and symmetrical two-halves PCB layers
An electronic assembly including a PCB and one or more multi-pin CGA devices coupled thereto, wherein the PCB has via-in-pad features with land pads connecting CGA pins to vias. The PCB layers are arranged symmetrically in a two-halves configuration about a central plane. The assembly specifically includes a pair of CGA devices mounted back-to-back with pins directly opposite each other.
Symmetrical power plane configuration for improved power integrity
The PCB comprises two groups of power planes arranged symmetrically about the central plane, with each group including first and second ground planes above and below the power planes, enhancing power integrity and noise reduction.
Blind via and through via configuration for signal breakout
Via-in-pad features include blind vias connecting land pads to layers within the same half of the PCB and through vias connecting corresponding pins of the back-to-back CGA devices.
Modified back-to-back connector mounting without internal threaded holes
The electronic assembly further comprises two connectors mounted along an edge of the PCB in a back-to-back configuration, where each connector’s mounting holes have no internal threads to allow proper tightening using screws and nuts.
PCB comprising multi-layer conductive and insulating layers with via-in-pad features
A PCB structure including multiple layers of conductive and insulating materials arranged symmetrically about a central plane, incorporating via-in-pad features with vias centered in land pads. The PCB includes blind vias coupling land pads on top or bottom surfaces with layers within the same half, and through vias with land pads on both surfaces.
The claims collectively describe a PCB and electronic assembly designed to accommodate high-density CGA devices in a back-to-back manner using via-in-pad technology with blind and through vias, symmetrical layer arrangements with multiple power and ground planes for power integrity, and connector modifications enabling efficient back-to-back mounting. These features collectively enable meeting stringent space flight quality standards while maximizing performance and interconnect density.
Stated Advantages
Allows use of high pin count CGA devices in back-to-back configurations while meeting IPC 6012B Class 3/A space flight quality standards.
Improves power integrity and noise reduction by employing symmetrical two-halves layer configurations with multiple power and ground planes near PCB surfaces.
Enables smaller via diameters through blind via-in-pad features, increasing routing space and manufacturing reliability.
Achieves higher interconnect density by using modified surface mount connectors mounted back-to-back without internal threaded holes, optimizing limited edge space.
Provides a symmetric board construction reducing PCB curvature and mechanical stress on solder joints, enhancing structural integrity.
Documented Applications
On-board data processing systems for space science missions requiring advanced instrumentation like laser altimeters, radar, lidar, and hyper-spectral instruments.
SpaceCube FPGA-based processors designed to provide orders of magnitude improvements in on-board computing power with power and cost efficiency.
High-performance space mission PCBs supporting reconfigurable, radiation-tolerant FPGA technology for real-time science data processing, lossless data reduction, and sensor web collaboration.
Spaceflight equipment requiring small, densely populated PCB assemblies with back-to-back multi-pin CGA devices and high interconnect capability in limited board edge space.
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