Methods and apparatus for interleaving priorities of a plurality of virtual processors
Inventors
Assignees
Interested in licensing this patent?
MTEC can help explore whether this patent might be available for licensing for your application.
Abstract
Methods and apparatus for interleaving priorities of a plurality of virtual processors are disclosed. A hypervisor assigns a base priority to each virtual processor and schedules one or more virtual processors to execute on one or more physical processors based on the current priority associated with each virtual processor. When the hypervisor receives an indication from one of the virtual processors that its current priority may be temporarily reduced, the hypervisor lowers the current priority of that virtual processor. The hypervisor then schedules another virtual processor to execute on a physical processor instead of the virtual processor with the temporarily reduced priority. When the hypervisor receives an interrupt for the virtual processor with the lowered priority, the hypervisor raises the priority of that virtual processor and schedules the virtual processor with the restored priority to execute on a physical processor so that processor can handle the interrupt.
Core Innovation
Discloses a method of interleaving priorities of a plurality of virtual processors by assigning a first maximum priority to a first virtual processor and a second maximum priority to a second virtual processor, where the second maximum priority is lower than the first maximum priority. The method schedules the first virtual processor to execute based on a first current priority associated with the first virtual processor being equal to the first maximum priority, and schedules the second virtual processor based on a second current priority associated with the second virtual processor being equal to the second maximum priority.
Receives an indication from the first virtual processor that the first current priority associated with the first virtual processor may be temporarily reduced, and lowers the first current priority to a temporary priority level lower than the second maximum priority. After lowering, the method schedules the second virtual processor to execute, thereby interleaving execution based on the relative current priority levels.
Receives an interrupt associated with the first virtual processor and raises the first current priority associated with the first virtual processor to the first maximum priority in response to the interrupt. The method schedules the first virtual processor to execute again based on the first current priority being equal to the first maximum priority, restoring execution priority after the lowered-priority period.
Claims Coverage
The independent claims cover four inventive features: a method for interleaving priorities across multiple virtual processors, an apparatus having a hypervisor for performing the same priority interleaving, computer-readable instructions implementing the priority interleaving on an electronic device, and a simplified method that lowers priority upon an indication and raises priority in response to an interrupt while maintaining a relative priority relationship between two virtual processors.
Maximum and lower maximum priority assignment with current-priority scheduling
Assigning a first maximum priority to a first virtual processor and assigning a second maximum priority to a second virtual processor, where the second maximum priority is lower than the first maximum priority, and scheduling the first virtual processor to execute based on a first current priority being equal to the first maximum priority.
Temporary priority reduction below the other virtual processor’s maximum
Receiving an indication from the first virtual processor that the first current priority may be temporarily reduced, and lowering the first current priority to a temporary priority level lower than the second maximum priority, then scheduling the second virtual processor based on its second current priority being equal to the second maximum priority.
Interrupt-driven restoration to maximum and rescheduling
Receiving an interrupt associated with the first virtual processor, raising the first current priority to the first maximum priority in response to the interrupt, and scheduling the first virtual processor to execute again based on the first current priority being equal to the first maximum priority.
Hypervisor-based apparatus for interleaving priorities
Providing a hypervisor and at least one physical processor operatively coupled to the hypervisor, where the hypervisor assigns a first maximum priority and a second maximum priority, schedules virtual processors based on current priorities equal to maximum priorities, receives an indication that the first current priority may be temporarily reduced and lowers it to a temporary priority level lower than the second maximum priority, and receives an interrupt to raise the first current priority back to the first maximum priority for rescheduling.
Computer-readable instructions for hypervisor-style interleaving of priorities
Storing instructions that cause an electronic device to assign a first maximum priority and a second maximum priority, schedule the first and second virtual processors based on current priorities being equal to respective maximum priorities, receive an indication that the first current priority may be temporarily reduced and lower it to a temporary priority level lower than the second maximum priority, receive an interrupt associated with the first virtual processor, raise the first current priority to the first maximum priority in response to the interrupt, and schedule the first virtual processor to execute again based on the first current priority being equal to the first maximum priority.
Lowering priority on indication and raising priority on interrupt with relative priority levels
Lowering a priority level of a first virtual processor to a first priority level in response to receiving an indication from the first virtual processor that the priority level may be lowered, where the first priority level is lower than a second priority level of a second virtual processor, and raising the priority level of the first virtual processor in response to receiving an interrupt for the first virtual processor.
Across the independent claims, the core coverage is interleaving execution of multiple virtual processors by assigning different maximum priorities, scheduling based on current priorities equaling maximum priorities, temporarily lowering the current priority of a virtual processor after an indication, scheduling another virtual processor while the lowered priority is in effect, and then restoring the lowered virtual processor’s current priority to its maximum in response to an interrupt and rescheduling it. The apparatus and instruction claims further ground this in a hypervisor and an electronic device executing stored instructions.
Stated Advantages
Includes motivation that thread-level priorities are not visible to the hypervisor, so effective interleaving is achieved despite thread-insensitive scheduling.
Documented Applications
No documented applications found
Interested in licensing this patent?