Radiation-hardened processing system

Inventors

Espinosa, Daniel C.Geist, AlessandroPetrick, David J.Flatley, Thomas P.Hosler, Jeffrey C.Crum, Gary A.Buenfil, Manuel

Assignees

National Aeronautics and Space Administration NASA

Publication Number

US-8484509-B2

Publication Date

2013-07-09

Expiration Date

2029-09-30

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Abstract

A processing system including an FPGA having a dual port RAM and for use in hostile environments. The FPGA includes three portions: a C&DH portion; a first scratch pad portion receiving a first set of data, processing the first set of data, and outputting a first set of processed data to a first location of the RAM; and a second scratch pad portion receiving a second set of data identical to the first set of data, processing the second set of data in the same way that the first set of data is processed, and outputting a second set of processed data to a second location of the RAM. The C&DH portion compares the first set of processed data to the second set of processed data and, if the first set of processed data is the same as the second set of processed data, outputs one set of processed data.

Core Innovation

The invention provides a processing system comprising radiation-tolerant field programmable gate arrays (FPGAs) with dual port RAMs, designed for use in hostile environments. Each FPGA includes three distinct portions: a command and data handling (C&DH) portion, and two scratch pad portions. Each scratch pad portion receives an identical set of data, processes it in the same way, and outputs processed data to distinct locations in the dual port RAM. The C&DH portion compares these outputs and, if they match, outputs one set of the processed data.

The processing system includes two such radiation-tolerant FPGAs, each operating similarly with pairs of scratch pad portions processing identical data sets. A radiation-hardened processor is used to receive and store the verified processed data output from the C&DH portions of both FPGAs into shared SDRAM memories. The system can process predefined test data or data from sensors and uses the comparison of processed results to detect errors and enhance reliability, enabling commercial radiation-tolerant devices to operate in hostile environments with error mitigation.

Claims Coverage

The patent includes two independent claims focusing on the architecture of a radiation-hardened processing system and a method for radiation hardening by design and software.

Processing system with dual-port RAM in radiation-tolerant FPGAs for error detection

A processing system comprising first and second radiation-tolerant FPGAs, each including a command and data handling portion and two scratch pad portions that receive identical data sets, process them in the same manner, output processed data to distinct dual port RAM locations, and compare these outputs to verify correctness before emitting processed data.

Use of a radiation-hardened processor to store and verify processed data

The radiation-hardened processor receives verified processed data from the C&DH portions of both radiation-tolerant FPGAs and stores it in SDRAM memories, enabling comparison of stored data to detect errors and improve data integrity.

Method for radiation hardening by design and software involving data processing and comparison

A method wherein within each radiation-tolerant FPGA, identical sets of data are processed twice, output data sets are compared to detect errors, and verified data is stored. Subsequently, stored data from the first radiation-tolerant FPGA is compared with stored data from the second FPGA to identify errors.

The independent claims cover a processing system architecture using paired scratch pad processors within radiation-tolerant FPGAs comparing outputs for error detection, complemented by a radiation-hardened processor for data storage and verification, along with a corresponding method for radiation hardening by design and software based on repeated processing and cross-comparison of data sets.

Stated Advantages

Enables use of commercially-available radiation-tolerant processors in hostile environments by increasing reliability through radiation hardening by design and software.

Allows error detection and mitigation with less computational overhead by comparing duplicate computations and repeating erroneous computations only when necessary.

Provides a small form factor, low power consumption processing system with high component density suitable for use in space or other hostile environments.

Supports in-flight reprogramming and compressed uploads to update processing software after deployment.

Achieves lossless data processing ensuring erroneous processed data is not generated and that desired information in original data can be retrieved.

Documented Applications

Use in hostile environments such as space applications for processing data from science instruments or sensors subject to radiation.

Integration with external platforms like the Materials International Space Station Experiment-7 (MISSE-7) on the International Space Station for demonstration and testing of radiation hardening capabilities.

On-board data processing for remote platforms carrying science instruments to reduce data storage and transmission needs by performing data selection, prioritization, and compression before downlink.

Retrofit application on existing sensor platforms to process raw data stored on-board and correct radiation-induced errors by re-executing computation steps.

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