Self-modifying FPGA for anti-tamper applications

Inventors

Lewis, James M. • Haddock, Joey R. • Walther, Dane R.

Assignees

Mercury Systems Inc

Abstract

A self-modifying FPGA system includes an FPGA and a configuration memory device coupled to the FPGA for providing the FPGA with configuration information. The configuration memory device is programmed with configuration data and dormant data. The FPGA system is also provided with a configuration assist circuit coupled to the FPGA and the configuration memory device for controlling loading of configuration information from the configuration memory device to the FPGA. A tamper detection system provides a tamper signal to the FPGA, wherein when a tamper signal is received by the FPGA the configuration data is replaced with the dormant data.

Core Innovation

A self-modifying FPGA system includes an FPGA and a configuration memory device coupled to the FPGA for providing configuration information. The configuration memory device is programmed with configuration data and dormant data, and configuration assist circuitry controls loading of the configuration information from the configuration memory device to the FPGA.

A tamper detection system provides a tamper indication signal to the FPGA, and when the tamper indication signal is received the configuration data is replaced with the dormant data. The FPGA includes a configuration block in communication with configuration assist circuitry to assist in rewriting configuration data from the configuration memory device.

In one described arrangement, the configuration data is located beginning at a zero address of the configuration memory device, and the FPGA system includes means for transferring the dormant data to the zero address upon initiation of the tamper indication signal. The configuration memory device includes dormant data located for use as replacement configuration, including sets of dormant data.

Claims Coverage

The independent claims cover a self-modifying FPGA anti-tamper architecture with a configuration memory storing both configuration data and dormant data, and a tamper-triggered replacement/reload mechanism. The claims include three inventive features spanning tamper-triggered data replacement, configuration assist circuitry with an FPGA configuration block, and transfer of dormant data to a zero address.

Across the independent claims, the core coverage is that tamper detection provides a tamper indication signal to an FPGA that causes configuration data loaded from a configuration memory device to be replaced by dormant data. The replacement is supported by configuration assist circuitry and an FPGA configuration block that assist rewriting and reloading, including transferring dormant data to the zero address upon tamper indication.

Stated Advantages

Documented Applications