Systems and methods for improved testing of system implementation given partially defined input values and expected output values
Inventors
Mugaluru Srinivasaiah, Nagaraj • Bhatt, Devesh • Kannaiyan, Shanmugavalli • Hvozdovic, Jan
Assignees
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Publication Number
US-12645569-B2
Publication Date
2026-06-02
Expiration Date
Abstract
Systems and methods for improved testing of system implementation are described herein. In one example, a method includes receiving a test case based on requirements for a system, wherein a first subset of all system inputs includes defined system inputs for the test case, wherein a second subset of all system inputs includes undefined system inputs for the test case. The method further includes generating extended test vectors from the test case by replacing the undefined system inputs for the test case with different values, wherein each respective extended test vector includes a different combination of values for the undefined system inputs from other extended test vectors. The method further includes executing the extended test vectors on a target platform for the system. The method further includes verifying whether outputs generated during execution of the extended test vectors match expected values for the defined system outputs for the test case.
Core Innovation
The invention relates to improved requirements-based system testing in which a test case or test vector is defined by a first subset of all system inputs that includes defined system inputs and by a second subset of all system inputs that includes undefined system inputs. The testing defines corresponding expected values for defined system outputs while leaving undefined inputs unspecified within the original test case/test vector.
From such a requirements-based test case/test vector, extended test vectors are generated by replacing the undefined system inputs with different values, wherein each respective extended test vector includes a different combination of values for the undefined system inputs from other extended test vectors. The extended test vectors are executed on a target platform, and outputs generated during execution are verified by checking whether outputs match expected values for defined system outputs for the test case.
The described approach contrasts with conventional default or fuzz/random input filling by systematically varying the defined subset of inputs left undefined in the requirements-based test case and by verifying that outputs are determined solely by the defined inputs. The disclosed rationale includes scenarios that can expose errors that current single-default testing may miss, including dependence errors, time-dependent step interactions, and exception triggering, with support for numerical tolerance and pass/fail indications.
Claims Coverage
The document describes three independent claims covering a method, a non-transitory computer-readable medium, and a system for generating and verifying extended test vectors. Across these independent claims, the inventive features focus on receiving requirements-based test cases or test vectors with undefined inputs, generating extended test vectors by substituting different values in different combinations, executing on a target platform, and verifying that outputs match expected values for defined outputs.
Generating extended test vectors from requirements-based test cases with undefined inputs
receiving a test case based on requirements for a system, wherein a first subset of all system inputs includes defined system inputs for the test case, wherein a second subset of all system inputs includes undefined system inputs for the test case; generating extended test vectors from the test case by replacing the undefined system inputs for the test case with different values, wherein each respective extended test vector includes a different combination of values for the undefined system inputs from other extended test vectors.
Executing and verifying output matching against expected values
executing the extended test vectors on a target platform for the system; and verifying whether outputs generated during execution of the extended test vectors match expected values for defined system outputs for the test case.
Generating extended test vectors by substituting undefined inputs in a non-transitory medium
receiving an original test vector based on requirements for a system, wherein at least one system input is defined for the original test vector and a first system input is undefined for the original test vector, wherein an expected value for at least one output is defined for the original test vector; generating extended test vectors for the original test vector by replacing the first system input that is undefined for the original test vector with different values, wherein each respective extended test vector includes a different value for the first system input.
Executing extended test vectors and verifying output matching in a medium
executing the extended test vectors on a target platform; and verifying whether outputs generated during the execution match expected values for defined system outputs.
A system that generates an extended test vector file by replacing undefined inputs with combinations
receive a test vector file that includes one or more test vectors, wherein each test vector is based on requirements for the system under test, wherein at least one system input is undefined for at least one execution step of each of the one or more test vectors; generate respective extended test vectors for each respective test vector of the one or more test vectors by replacing undefined system inputs for the respective test vector with different values, wherein the respective extended test vectors generated from the respective test vector include different combinations of values for the undefined system inputs for the respective test vector; and generate an extended test vector file that includes the generated respective extended test vectors for each respective test vector of the one or more test vectors.
Across the independent claims, the core coverage is requirements-based testing where undefined inputs are systematically replaced with different values in extended test vectors, the resulting extended test vectors are executed on a target platform, and verification checks that outputs match expected values for defined system outputs, with the system claim further covering generation of an extended test vector file.
Stated Advantages
Provides confidence that outputs are determined solely by defined inputs.
Detects errors that current single-default testing may miss, including dependence errors, time-dependent step interactions, and exception triggering (e.g., overflow/divide-by-zero).
Documented Applications
Requirements-based system testing using test cases or test vectors where undefined system inputs are expanded into extended test vectors executed on a target platform with verification against expected values.
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