Systems and methods for determining system intermediate and output values with partially defined system input values
Inventors
Hvozdovic, Jan • Bhatt, Devesh • Schlossmacher, Edward • Mugaluru Srinivasaiah, Nagaraj
Assignees
Interested in licensing this patent?
MTEC can help explore whether this patent might be available for licensing for your application.
Publication Number
US-12639185-B2
Publication Date
2026-05-26
Expiration Date
Abstract
In one example, a method includes receiving one or more test scenarios based on requirements for a system under test having one or more inputs, wherein a value for at least one input of the one or more inputs is undefined for at least one test scenario of the one or more test scenarios. The method further includes determining system intermediate values and system output values that are unambiguously derivable from defined system inputs for the one or more test scenarios. The defined system inputs are defined in the one or more test scenarios and not assumed or default input values. The method further includes determining coverage of one or more functional characteristics of each function of the system under test executed based on the defined system inputs. The method further includes validating the determined system output values that are unambiguously derivable from the defined system inputs.
Core Innovation
The invention provides a method and system for evaluating a system under test using one or more test vectors based on requirements, where at least one test vector contains one or more undefined input values. The approach determines system intermediate values and system output values that are derived only from defined system inputs that are explicitly defined in the one or more test vectors, without consideration of assumed or default input values. Undefined inputs are treated such that derived values are not based on any assumed or default input values.
Based on the defined system inputs only, the invention determines coverage of one or more functional characteristics of each function of the system under test executed, and validates the determined system output values that are derived only from the defined system inputs. The validation and coverage depend solely on the defined system inputs and are performed without relying on assumed or default input values.
The invention includes computation mechanics in which topological order and propagated versus unpropagated marking are used so that only values derived from defined inputs are propagated through functions, and propagated values can be marked and removed from further analysis while unpropagated marking can be reapplied for other functions. Optional aggregation combines coverage results across multiple test vectors, and reporting/validation output is produced to reflect the determined coverage of functional characteristics for each function based on the defined system inputs and validation results.
Illustrative examples indicate the handling of undefined inputs and derived outputs for combinational logic, boolean/time-dependent behavior, and startup/delay/debounce behavior, with marking that indicates undefined inputs/outputs are excluded unless an unambiguous derivation from defined inputs is possible.
Claims Coverage
The document contains three independent claims (a method, a system, and a system with processors and a non-transitory computer readable medium). Across these independent claims, the inventive focus is on deriving intermediate and output values only from explicitly defined test-vector inputs (without assumed/default values), determining functional-characteristic coverage of executed functions based only on those defined inputs, and validating the derived output values accordingly. Additional dependent claim coverage mechanisms address propagation/topological ordering, undefined/defined marking rules, time-history across multiple test vectors, aggregation of coverage across multiple test vectors, and reporting validation/coverage results.
Method using undefined test-vector inputs with derived values only from explicitly defined inputs
receiving one or more test vectors based on requirements for a system under test having one or more inputs, wherein a value for at least one input of the one or more inputs is undefined for at least one test vector; determining system intermediate values and system output values that are derived only from defined system inputs for the one or more test vectors, wherein the defined system inputs are explicitly defined in the one or more test vectors without consideration of assumed or default input values; determining coverage of one or more functional characteristics of each function of the system under test executed based on the defined system inputs; and validating the determined system output values that are derived only from the defined system inputs.
System determining coverage and validating derived outputs using defined test-vector inputs only
an input configured to receive information about a system under test having one or more inputs with a value for at least one input undefined for at least one test vector based on requirements; one or more functions configured to generate respective intermediate value based, at least in part, on a value of at least one input; one or more outputs configured to provide an output value based, at least in part, on at least one respective intermediate value; and one or more computational elements configured to determine intermediate values and output values derived only from defined system inputs for the one or more test vectors without consideration of assumed or default input values; determine coverage of one or more functional characteristics of each of the one or more functions dependent on only the defined system inputs; and validate the system output values determined from only the defined system inputs.
Processor-executable instructions for intermediate/output derivation and validation using explicitly defined test-vector inputs only
receive one or more test vectors based on requirements for a system under test having one or more inputs, one or more functions configured to generate respective intermediate value based on a value of at least one input, and one or more outputs configured to provide an output value based on at least one respective intermediate value; determine system intermediate values and system output values that are derived only from input values defined in the one or more test vectors without consideration of assumed or default input values, wherein an input value for at least one input is undefined for at least one test vector; determine coverage of one or more functional characteristics of each function of the system under test executed based on the input values defined in the one or more test vectors; and validate the determined system output values that are derived only from the input values defined in the one or more test vectors.
Across the independent claims, the core claim coverage centers on computing intermediate values and output values only when derivable from explicitly defined inputs in the test vectors (excluding assumed/default input values even when some inputs are undefined), using only those defined inputs to determine coverage of functional characteristics for executed functions, and validating the determined output values using only the defined inputs.
Stated Advantages
Determined coverage of functional characteristics based only on defined system inputs without consideration of assumed or default input values.
Validation of determined system output values derived only from the defined system inputs.
Documented Applications
Evaluating a system under test using test vectors in which some input values are explicitly undefined, including cases involving combinational logic, boolean/time-dependent behavior, and startup/delay/debounce behavior.
Interested in licensing this patent?