Systems and methods for multiplexed amplifiers for brain computer interfaces
Inventors
Shull, Gabriella • Viventi, Jonathan • Jochum, Thomas • Fang, Hui • Trumpis, Michael
Assignees
Dartmouth College • Duke University
Publication Number
US-12333073-B2
Publication Date
2025-06-17
Expiration Date
2043-10-13
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Abstract
A brain computer interface for interfacing with a brain of a subject is provided. The brain computer interface includes one or more shanks. Each shank includes an array of pixels and output traces. Each pixel includes an electrode and a front-end circuit positioned at a site of the electrode. The front-end circuit is configured to reduce noise in signals recorded by the electrode, and further configured to multiplex the signals. A density of power consumption of the each pixel is equal to or less than 1 μW per area of 50 μm by 50 μm. The output traces are electrically coupled with the array of pixels. A number of output traces is less than a number of pixels in the array due to multiplexing. The one or more shanks are configured to be inserted on and/or into a brain of a subject.
Core Innovation
The invention is a brain computer interface (BCI) comprising one or more shanks, each containing an array of pixels. Each pixel includes an electrode and a front-end circuit positioned at the site of the electrode. The front-end circuit is configured to reduce noise in the signals recorded by the electrode and to multiplex the signals. This architecture allows for the density of power consumption of each pixel to be equal to or less than 1 μW per area of 50 μm by 50 μm. Output traces are electrically coupled with the array of pixels, and due to multiplexing, the number of output traces is less than the number of pixels in the array. The shanks are configured to be inserted on and/or into the brain of a subject.
The problem addressed by this invention is that known brain computer interfaces are limited in scalability and performance due to the need for each electrode to have a dedicated output trace. This constraint prevents high-density electrode arrays from covering large areas of the brain while maintaining high spatial resolution and signal quality. Passive electrode arrays suffer from an exponential increase in wiring complexity as coverage expands and cannot maintain electrode density or minimize wiring sufficiently for direct interface with brain tissue.
The invention solves these challenges by integrating active front-end circuits—including amplifiers and filters—at the electrode site to enhance signal-to-noise ratio, multiplexing signals to reduce the number of output traces, and limiting per-pixel power consumption to avoid heat-induced tissue damage. Fabrication methods such as transfer-printing and rolling enable flexible, thin, and scalable electrode arrays with enhanced biocompatibility and 3D structuring. Additional noise reduction can be achieved via kriging filtering applied to the signals, and the system is compatible with a BCI computing device for further signal processing and BCI applications.
Claims Coverage
The patent claims coverage centers on three core inventive features: the structure and function of an improved brain computer interface with active pixel multiplexing and low power operation, a corresponding fabrication method, and a system integrating the above with computational processing for noise reduction and BCI signal output.
Brain computer interface with active pixel multiplexing and low power operation
A brain computer interface comprises: - One or more shanks, each with an array of pixels; - Each pixel includes an electrode and a front-end circuit at the electrode site, configured to reduce noise and to multiplex recorded signals; - Each pixel's power consumption density is equal to or less than 1 μW per 50 μm by 50 μm area; - Output traces electrically coupled with the pixel array, with fewer output traces than pixels due to multiplexing; - The shanks are designed for insertion on and/or into a brain.
Method of fabricating brain computer interface with scalable and protective features
A fabrication method comprising: - Forming one or more shanks, each with an array of pixels (each pixel with an electrode and front-end circuit for noise reduction and multiplexing, with per-pixel power density ≤ 1 μW/50 μm x 50 μm area); - Output traces coupled with the pixel array, with output trace count reduced by multiplexing; - Shanks are insertable into/on the brain; - Steps for transferring the shanks to a substrate, optionally using a seal ring to shield the shank from mechanical cracks, and transfer-printing for flexibility; - Circuit optimization to meet specified power, noise, and bandwidth thresholds; - Optional steps for rolling the shank array into a 3D form and/or partially stiffening shanks for insertion, and forming shanks with tapered tips for easier brain insertion.
Brain computer interface system with processor for noise reduction and BCI processing
A brain computer interface system includes: - A brain computer interface as above (shanks with multiplexed, low-power pixel arrays), - A computing device electrically coupled to the brain computer interface, comprising at least one processor and memory, - The processor is programmed to process signals from the brain computer interface, and (in covered embodiments) to apply kriging filters to reduce noise in signals corresponding to local field potentials.
In summary, the independent claims cover (1) an advanced BCI structure with active, multiplexed, low-power pixel arrays, (2) a flexible, scalable, and protective fabrication method supporting such BCIs, and (3) a complete BCI system with computational noise reduction for advanced brain signal interfacing.
Stated Advantages
Reduces the number of output traces required, enabling high-density and scalable electrode arrays for larger brain coverage.
Increases signal-to-noise ratio by incorporating front-end circuits with amplification and filtering at each electrode site.
Limits per-pixel power consumption to prevent thermal damage to neurons, making the interface suitable for direct brain insertion.
Enhances biocompatibility and reduces micro-motion by using flexible, thin, transfer-printed circuits that conform to brain tissue.
Covers the full frequency spectrum of brain signals, including local field potentials and action potentials, for comprehensive neural recording.
Enables fabrication of scalable, 3D electrode structures through rolling methods and targeted stiffening for easy and safe insertion.
Further reduces noise post-acquisition by applying kriging filtering, improving the accuracy of neural recordings.
Documented Applications
Restoring or supplementing brain functions lost due to injury or diseases using brain computer interfaces.
Generating speech based on brain signals for brain computer interface applications.
Creating high channel-count neural recording arrays for neuroscience research and clinical use.
Intracortical recording and stimulation for prosthetic and therapeutic devices targeting motor, speech, vision, or hearing restoration.
Chronic in vivo monitoring of neural activity in animals (e.g., freely moving rodent models) and assessment of neural probe biocompatibility.
High-density, large-area neural signal acquisition for resolving single-neuron activity and high-resolution sampling throughout brain volumes.
Flexible device architectures for surface and penetrating neural electrode interfaces.
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