Automatic self checking and healing of physically unclonable functions
Inventors
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Assignees
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Rice UniversityRice University is a leading research university in Houston, Texas, recognized for its emphasis on scientific discovery, innovation, and interdisciplinary collaboration. The institution is committed to academic excellence, impactful research, and community engagement, offering robust undergraduate and graduate programs in engineering, natural sciences, social sciences, humanities, business, and the arts. Rice is distinguished by its history of collaboration with organizations such as NASA, fostering advances in space science, biotechnology, energy research, and artificial intelligence.
Rice University is a leading research university in Houston, Texas, recognized for its emphasis on scientific discovery, innovation, and interdisciplinary collaboration. The institution is committed to academic excellence, impactful research, and community engagement, offering robust undergraduate and graduate programs in engineering, natural sciences, social sciences, humanities, business, and the arts. Rice is distinguished by its history of collaboration with organizations such as NASA, fostering advances in space science, biotechnology, energy research, and artificial intelligence.
Publication Number
US-12301737-B2
Publication Date
2025-05-13
Expiration Date
Abstract
A method and circuit for an Automatic Self Checking and Healing (ASCH) of Physically Unclonable Functions (PUFs), the method includes: controlling a skew input added to each PUF cell of a PUF array in a circuit with sub-mV resolution; healing a portion of unstable bits of each PUF cells locally; and performing a second self-checking on healed PUF cells to determine final PUF cells to discard. The method further includes performing at least one of a static operation mode, a dynamic operation mode, and a hybrid operation mode of ASCH stabilization system based on design needs to reconfigure and mask the PUF array to achieve less than 1E-8 Bit Error Rate (BER) with less than 25% masking ratio. The circuit includes the skew input, a self-checking controller, a high-speed readout, a validity detector, and a Digital-to-Analog Converter (DAC). Further, each PUF cell in the PUF array is an inverter-based PUF and includes a first stage inverter and a second stage inverter such that the second stage inverter includes other stages except the first stage inverter.
Core Innovation
Embodiments disclosed herein relate to a method and circuit for an Automatic Self Checking and Healing (ASCH) of Physically Unclonable Functions (PUFs), the method includes controlling a skew input added to each PUF cell of a PUF array in a circuit with sub-mV resolution, healing a portion of unstable bits of each PUF cells locally, and performing a second self-checking on healed PUF cells to determine final PUF cells to discard; the circuit comprises the skew input, a self-checking controller, a high-speed readout circuit, a validity detector, and a Digital-to-Analog Converter (DAC), and each PUF cell in the PUF array is an inverter-based PUF and includes a first stage inverter and a second stage inverter such that the second stage inverter includes other stages except the first stage inverter.
The background identifies that the development of PUF circuits that are power and area efficient with high dark bit detection accuracy and low operation overhead and that exhibit good reliability and stability is an area of active research, and that embodiments disclosed herein address the reliability issue of PUF keys under environmental variations without using expensive ECCs.
Embodiments provide an improved PUF array using ASCH stabilization system that modulates the supply voltage difference between stages, performs self-checking to find dark bits with a configurable threshold, leverages in-cell reconfiguration to heal unstable cells locally, and performs at least one of a static operation mode, a dynamic operation mode, and a hybrid operation mode to reconfigure and mask the PUF array to achieve less than 1E-8 Bit Error Rate (BER) with less than 25% masking ratio.
Claims Coverage
Three independent claims were identified. The following inventive features were extracted from the independent claims.
Sub-mV skew input control
Controlling a skew input added to each PUF cell of a PUF array in a circuit with sub-mV resolution.
Local healing of unstable bits
Healing a portion of unstable bits of each PUF cells locally.
Second self-checking of healed cells
Performing a second self-checking on healed PUF cells to determine final PUF cells to discard.
ASCH operation modes for reconfiguration and masking
Performing at least one of a static operation mode, a dynamic operation mode, and a hybrid operation mode of ASCH stabilization system to reconfigure and mask the PUF array to achieve less than 1E-8 Bit Error Rate (BER) with less than 25% masking ratio.
ASCH circuit components
A circuit that comprises the skew input, a self-checking controller, a high-speed readout circuit, a validity detector, and a Digital-to-Analog Converter (DAC).
Inverter-based PUF cell stage structure
Each PUF cell in the PUF array is an inverter-based PUF and includes a first stage inverter and a second stage inverter such that the second stage inverter comprises other stages except the first stage inverter.
8-bit resistive DAC and auto-zeroing comparator
The circuit comprises an 8-bit resistive Digital-to-Analog Converter (DAC) and an auto-zeroing comparator as claimed in the circuit claim.
Validity detector for automatic unstable cell detection
A validity detector for automatic detection of unstable cells by checking stability of the PUF cell based on an evaluated PUF bit.
The independent claims cover a method, a circuit, and a non-transitory computer readable medium implementing ASCH, with core inventive features including sub-mV skew input control, local healing and second self-checking of healed cells, selectable static/dynamic/hybrid ASCH operation modes to reach very low BER with low masking ratio, a circuit comprising specific ASCH components including an 8-bit resistive DAC and auto-zeroing comparator, and an inverter-based PUF cell structure with distinct first and second stage inverters.
Stated Advantages
Improved reliability of PUF keys under environmental variations without using expensive ECCs.
Ability to achieve less than 1E-8 Bit Error Rate (BER) with less than 25% masking ratio.
High dark bit detection accuracy and low operation overhead, enabling significant reduction in masking ratio compared with direct masking (for example, ASCH reduced masking ratio from 60% to 30% in a reported measurement).
Compact, stable, low power inverter-based PUF cell with high native stability and an almost sole source of mismatch that can be leveraged for self-checking.
High throughput and energy efficiency demonstrated (for example, 22 Gb/s throughput and 0.057 fJ/b core energy in prototyping measurements).
Documented Applications
Low-cost and secure key generation and storage in broad security applications.
Key storage, chip authentication, supply chain protection, and secure communications.
Use in any PUF array with ASCH stabilization system for low-cost and secure key generation and storage.
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