Fault-tolerant scalable modular quantum computer architecture with an enhanced control of multi-mode couplings between trapped ion qubits
Inventors
Monroe, Christopher • Kim, Jungsang
Assignees
University of Maryland Baltimore • Duke University
Publication Number
US-12299537-B2
Publication Date
2025-05-13
Expiration Date
2034-08-01
Interested in licensing this patent?
MTEC can help explore whether this patent might be available for licensing for your application.
Abstract
A modular quantum computer architecture is developed with a hierarchy of interactions that can scale to very large numbers of qubits. Local entangling quantum gates between qubit memories within a single modular register are accomplished using natural interactions between the qubits, and entanglement between separate modular registers is completed via a probabilistic photonic interface between qubits in different registers, even over large distances. This architecture is suitable for the implementation of complex quantum circuits utilizing the flexible connectivity provided by a reconfigurable photonic interconnect network. The subject architecture is made fault-tolerant which is a prerequisite for scalability. An optimal quantum control of multimode couplings between qubits is accomplished via individual addressing the qubits with segmented optical pulses to suppress crosstalk in each register, thus enabling high-fidelity gates that can be scaled to larger qubit registers for quantum computation and simulation.
Core Innovation
The invention presents a modular quantum computer architecture (MUSIQC) that enables scalable and fault-tolerant quantum computation using a hierarchy of interactions between modular registers, known as elementary logic units (ELUs). Local entangling gates within a single ELU are accomplished by controlled interactions between the qubits, leveraging qubit state-dependent optical forces shaped via segmented laser pulses to suppress crosstalk. Entanglement between distant ELUs is achieved probabilistically through a photonic interface, whereby photons emitted from communication qubits in different ELUs are interfered and detected, allowing for long-distance quantum gates independent of relative location.
This architecture overcomes scalability limitations found in previous trapped ion and quantum computer systems, such as decoherence and gate speed degradation due to increasing system size, as well as crosstalk and error accumulation in large quantum registers. By separating computation among modular ELUs and using a dynamically reconfigurable photonic network for inter-module entanglement, the system is capable of supporting multi-dimensional cluster states, efficient implementation of complex quantum circuits, and enhanced error correction mechanisms including the use of the Steane code.
The modular approach allows dynamic configuration of quantum circuits in accordance with prescribed algorithms, supported by a central processing unit. Scalability is further enabled by optimal quantum control of multi-mode couplings, individual qubit addressing, and segmented laser pulse shaping to reduce internal mode crosstalk. This leads to high-fidelity gates suitable for quantum simulation and computation on a very large scale, supporting applications like quantum adders and Shor’s algorithm, while maintaining fault-tolerance even with probabilistic and slow interconnects.
Claims Coverage
The independent claims define three main inventive features relating to modular quantum computing architecture with photonic interconnects, hierarchical and multiplexed connections, subsystems for initialization and isolation, and quantum circuit support.
Quantum computer with modular logic units interconnected by a photonic interconnect network
A quantum computer comprising: - A plurality of logic units, where each logic unit includes a plurality of ion qubits (including at least a first and second logic unit, each with their respective ion qubits). - A laser configured to stimulate specific state transitions of the ion qubits. - A photonic interconnect network operatively coupled to the logic units to connect, via multiplexing, the result of a state transition in a given ion qubit to another logic unit by mapping the result to a photon propagated through the photonic interconnect network. - The photonic interconnect network enables multiplexed communication between logic units, mapping quantum state transitions onto propagating photons.
Quantum computer with three or more hierarchical logic units and processor-controlled multiplexing
A quantum computer comprising: - At least three logic units, each containing a plurality of qubits (with designated ion qubits), allowing chains of physical qubits and inclusion of refrigerator and communication qubits. - A laser configured to stimulate distinct state transitions on individual ion qubits across the logic units. - A photonic interconnect network, coupled to the plurality of logic units, that connects via multiplexing and maps state transitions of selected ion qubits to photons, which are used for communication between logic units. - A processor, operatively coupled to the photonic interconnect network, to control the multiplexing and to form or reconfigure quantum circuits, as well as apply entanglement swapping protocols to coordinate entanglement generation with communication times.
Quantum computer with subsystem for multiqubit state detection and quantum circuit operation
A quantum computer comprising: - A plurality of logic units, at least one of which includes multiple ion qubits and supports a chain arrangement with refrigerator and communication qubits, and another logic unit with at least two ion qubits. - A laser configured to stimulate state transitions in multiple ion qubits (T1, T2, T3, T4, etc.). - A photonic interconnect network for multiplexed communication between logic units, mapping state transitions to photons. - A subsystem to detect coincidence events for photons emitted from qubits across logic units, comprising an array of Bell state detectors. - A quantum adder circuit configured to compute sums of n-bit integers, utilizing logical qubits distributed among logic units at a specified level of code concatenation (e.g., Steane code encoding). - Capability to operate with quantum gates, coordinate qubit state measurement, and support fault-tolerant probabilistic photonic connections, with at least one state transition being a Raman state transition.
The inventive features revolve around a scalable modular quantum computer architecture with multiplexed photonic interconnects, advanced subsystem configurations for initialization, isolation, and detection, and explicit support for dynamic control, quantum circuit formation, and error correction.
Stated Advantages
Enables construction of quantum processors with a large number of stationary matter qubits—scalable to thousands or more—using reliable and demonstrated component technologies.
Provides high-fidelity, scalable entanglement and efficient quantum gates between both local and distant qubits through optimal quantum control and photonic interconnects, supporting large-scale quantum computation and simulation.
Allows dynamic and reconfigurable quantum circuit formation with flexible connectivity enabling complex algorithms, regardless of qubit locations.
Attains significant processing speed and resource reduction compared to other architectures by efficiently realizing quantum gates and supporting highly parallel algorithm implementation.
Supports fault-tolerant error correction, even with probabilistic and slow interconnects, via advanced coding and error correction mechanisms such as Steane code and multi-dimensional cluster states.
Reduces the technical complexity of hardware compared to traditional ion trap architectures by eliminating the need for ion shuttling and complex multi-electrode structures within modular logic units.
Minimizes crosstalk errors and preserves gate fidelity in large registers using optimal laser pulse shaping and individual addressing of qubits.
Achieves scalability not only in the number of qubits, but also in control architecture and integration, facilitated by microfabrication and optical networking technologies.
Documented Applications
Implementation of quantum adder circuits, including quantum ripple-carry adders (QRCA) and quantum carry-look-ahead adders (QCLA), to compute sums of two n-bit integers.
Execution of Shor's algorithm for integer factorization, with detailed resource and execution time estimates provided for various problem sizes.
Formation of complex quantum circuits prescribed by quantum algorithms, including realization of X, CNOT, and Toffoli gates, and support for modular exponentiation circuits.
Mapping to and creation of multi-dimensional cluster states, such as 3D cluster states, for fault-tolerant universal quantum computation.
Dynamic reconfiguration of modular quantum registers into multi-dimensional computational hypercells for various algorithm and circuit configurations.
Quantum simulation and arbitrary quantum information processing using high-fidelity, scalable gates among large-scale qubit registers.
Interested in licensing this patent?