Solid state data recorder (SSDR) for use with form-factor avionics systems
Inventors
Geist, Alessandro • Wilson, Christopher • Brewer, Cody • Lanham, Austin • Franconi, Nicholas • Wise, Travis
Assignees
National Aeronautics and Space Administration NASA
Publication Number
US-12118234-B1
Publication Date
2024-10-15
Expiration Date
2042-08-23
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Abstract
The present invention relates to a single-board solid state data recorder (SSDR) card configured for use in a 1U CubeSat payload form-factor multi-purpose architecture, which includes: a field programmable gate array (FPGA): a plurality of NAND storage banks of non-volatile NAND Flash storage, the plurality of NAND storage banks which store operational data, each of which is controlled by a NAND Flash controller which controls the signaling of the plurality of NAND storage banks and reading and writing to the plurality of NAND storage banks; and a plurality of SpaceWire nodes and a plurality of multi-gigabit transceivers which command the SSDR card and read/write data to the SSDR card; wherein the plurality of NAND Flash memory banks is independently controlled and independently powered.
Core Innovation
The invention described is a miniaturized, high-reliability solid state data recorder (SSDR) card designed for small satellite (SmallSat) and CubeSat applications. It fits in a 1U CubeSat payload form-factor with dimensions of approximately 10 cm by 10 cm and enables space mission developers to assemble payload packages by mix-and-matching CubeSat electronic slices. The SSDR features high-density NAND Flash storage banks controlled individually for data storage and powered independently to enhance reliability and efficiency.
The device addresses significant challenges faced by existing CubeSat data recorders, which either suffer from poor radiation performance, insufficient high-speed data rates, or large form factors unsuited to CubeSat volume and mass constraints. Present industry solutions lack components qualified for harsh radiation environments such as geostationary orbit, lunar, or planetary missions and do not balance size, weight, power, and cost (SWaP-C) effectively. The invention therefore aims to provide a compact, high throughput, radiation-hardened SSDR with robust error detection and correction, suitable for harsh space environments and capable of sustaining mission-critical data storage needs where redundancy options are limited.
The SSDR integrates a radiation-hardened FPGA, multiple NAND Flash memory banks controlled via dedicated controllers, multiple SpaceWire nodes, and multi-gigabit transceivers, all connected through a central memory interconnect to support command, control, data read/write, and error correction functions. The architecture supports selective NAND bank population and independent power control, allowing power consumption optimizations. Additionally, the design is compliant with CubeSat standards, permitting expandable configurations with processor cards, backplanes, and other modules within the CubeSat form-factor avionics architecture, accommodating varied mission-specific requirements while maintaining reliability and high performance.
Claims Coverage
The patent claims include multiple inventive features centered around a single-board SSDR card and its integration within a 1U CubeSat multi-purpose architecture. The following inventive features are identified from the independent claims.
Single-board solid state data recorder architecture
A SSDR card configured for 1U CubeSat form-factor comprising a radiation-tolerant FPGA; multiple non-volatile NAND Flash storage banks each controlled by NAND Flash controllers; a plurality of SpaceWire nodes and multi-gigabit transceivers for command and data read/write; CCSDS depacketizers/packetizers converting CCSDS packets from SpaceWire nodes to AHB transactions; and an AXI-to-AHB bridge converting multi-gigabit transceiver AXI transactions to AHB transactions. The NAND Flash memory banks are independently controlled and powered.
High-density backplane connectivity
The SSDR card further includes a high-density, high-speed open-pin field array backplane connector facilitating insertion into a backplane for signal routing to and from the SSDR and other cards.
Central memory interconnect managing multiple interfaces
A central memory interconnect that receives and manages first and second AHB transactions, connects to control/status registers, multiple NAND Flash controllers, and an SRAM controller, and supports multiple external memory interface types.
SRAM buffering for high-speed data transactions
An SRAM controller connected to an external SRAM chip buffers high-speed transactions between multi-gigabit transceivers and NAND Flash controllers, enabling sustained throughput via multiple SRAM memory buffers.
Data integrity and error correction mechanisms
The FPGA implements data randomization schemes to prevent corruption, and incorporates multiple Reed-Solomon cores to detect and correct errors in data stored in NAND Flash storage banks, with scramblers randomizing incoming data to NAND controllers to prevent patterned errors.
Independent control and power management of NAND Flash banks
Independent control and power of each NAND Flash bank allow selective population of memory to adjust density and reduce power consumption, including the capability to operate in lower power modes by powering on only one NAND bank at a time, significantly reducing power requirements.
Radiation-hardened power and telemetry monitoring systems
Inclusion of multiple radiation-hardened voltage regulators, a 12-bit ADC for housekeeping telemetry monitoring temperature and voltage to prevent operational exceedances, and a voltage supervisor to provide power-on reset and proper power sequencing for voltage regulators.
Multi-card CubeSat payload form-factor system integration
A 1U CubeSat payload form-factor multi-purpose architecture containing the SSDR card alongside a plurality of mission-specific processor cards interconnected via a backplane routing signals and allowing interchangeable card placement. The SSDR is employed for data storage capacity within this architecture.
The claims collectively cover a radiation-hardened, compact, high-density SSDR card featuring modular NAND Flash storage banks with independent control and power, integrated error detection and correction, high-speed communication interfaces, and a scalable CubeSat multi-card architecture for diversified mission applications.
Stated Advantages
High reliability suitable for harsh radiation environments including geostationary, lunar, polar, and planetary orbits.
Miniaturized form factor compatible with 1U CubeSat standards enabling flexible payload configurations.
High-density storage capacity of approximately 12 Terabits with sustained high data transfer rates for read/write operations.
Low power consumption achievable through independent power control of NAND Flash banks and selective memory population.
Integrated error detection and correction, including Reed-Solomon coding and data randomization to prevent corruption.
Scalable and reusable system architecture that allows mix-and-match of CubeSat electronic slices, supporting diverse mission requirements.
Use of radiation-hardened components and intelligent architectural design enhances onboard computing capability while reducing cost and power requirements.
Documented Applications
Storage for data collected from high-performance detectors and sensors on CubeSat and SmallSat space missions.
Use in harsh radiation environment orbits such as geostationary earth orbit (GEO), low earth orbit (LEO), polar, lunar, and planetary missions.
Integration into a multi-purpose CubeSat payload system architecture combining SSDR with mission-specific processor cards for onboard computing.
Applicable for military and aerospace applications requiring miniaturized, high performance solid state data recording systems.
Support for unmanned aerial vehicles (UAVs), sounding rockets, robotics, exploration missions, and cyber security applications including encryption.
Deployment in missions like lunar orbit communications and navigation nodes, precision landing algorithms for landers, and mobility guidance for lunar robots and rovers.
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