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Publication Number

US-11843407-B2

Patent

Publication Date

2023-12-12

Expiration Date


Abstract

Systems, methods, and computer program product embodiments are disclosed for removing any fixed frequency interfering signal from an input signal without introducing artifacts that are not part of the original signal of interest. An embodiment operates by using a virtual buffer with a length that matches a length of one cycle of an interfering signal. The embodiment extracts the interfering signal into the virtual buffer. For a sample in the next cycle of the interfering signal that corresponds to a virtual memory location for the virtual buffer, the embodiment can update one or more physical memory locations of the virtual buffer that are in the vicinity of the virtual memory location. This use of virtual buffer can remove any interfering signal without creating the artifacts associated with conventional notch filters.

Core Innovation

The invention describes a universal notch filter that removes a fixed-frequency interfering signal from an input signal while reducing artifacts such as overshoot and ringing. The filter uses a virtual buffer having virtual memory locations whose length corresponds to one cycle of the interfering signal. During quiet times in the input signal, the processor accesses and updates samples of the interfering signal in the virtual memory locations of the virtual buffer.

After updating the virtual buffer during the quiet period, the processor subtracts the samples from a single cycle of the interfering signal in the virtual buffer from the input signal to create a filtered signal. This subtracting removes the interfering signal from the input signal. The approach is described as a way to suppress an interfering signal while avoiding artifacts, including when the interfering signal includes harmonics.

The disclosed techniques further include determining and tracking the interfering signal frequency, with adjustable convergence time and flexible tuning of notch frequency and harmonic rejection. Handling of interfering-signal cycle lengths that are non-integral in sample intervals is described using virtual memory locations that include non-physically addressable virtual locations and vicinity updates, including interpolation and averaging to update the virtual buffer contents.

Claims Coverage

The partial content provides three independent claims, each covering the same core inventive combination consisting of a universal notch filtering workflow with virtual-buffer-based storage, quiet-period detection, updating interfering-signal samples in virtual memory locations, and subtracting a single-cycle replica to remove the interfering signal.

Universal notch filter with quiet-period-driven virtual buffer update and single-cycle subtracting

A universal notch filter comprising a memory configured to store a virtual buffer having virtual memory locations, and at least one processor coupled to the memory and configured to access an input signal having an interfering signal, determine a quiet period in the input signal, update, during the quiet period, samples of the interfering signal in the virtual memory locations of the virtual buffer, and subtract the samples from a single cycle of the interfering signal in the virtual buffer from the input signal to create a filtered signal, wherein the subtracting removes the interfering signal from the input signal.

Non-transitory computer-readable medium with quiet-period-driven virtual buffer update and single-cycle subtracting

A non-transitory computer-readable medium having instructions stored thereon that, when executed by at least one computing device, cause the at least one computing device to perform operations comprising accessing an input signal having an interfering signal, determining a quiet period in the input signal, updating, during the quiet period, samples of the interfering signal in virtual memory locations of a virtual buffer, and subtracting the samples from a single cycle of the interfering signal in the virtual buffer from the input signal to create a filtered signal, wherein the subtracting removes the interfering signal from the input signal.

Computer-implemented method with quiet-period-driven virtual buffer update and single-cycle subtracting

A computer-implemented method for filtering an input signal to create a filtered signal, comprising accessing an input signal having an interfering signal, determining a quiet period in the input signal, updating, during the quiet period, samples of the interfering signal in virtual memory locations of a virtual buffer, and subtracting the samples from a single cycle of the interfering signal in the virtual buffer from the input signal to create a filtered signal, wherein the subtracting removes the interfering signal from the input signal.

Across the independent claims, the main inventive coverage centers on determining a quiet period, updating interfering-signal samples into a virtual buffer during that quiet period, and subtracting a single-cycle replica stored in the virtual buffer from the input signal to remove the interfering signal.

Stated Advantages

Reduces artifacts such as overshoot and ringing.

Suppresses fixed-frequency interfering signals from an input signal, including interfering-signal harmonics.

Documented Applications

Electrocardiography/electrophysiology is explicitly referenced as an example context for the described filtering.

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