Error detection and rejection for a diagnostic testing system
Inventors
Modzelewski, Brent E. • Kayihan, Ferhan • Cardello, Edward
Assignees
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Publication Number
US-11327823-B2
Publication Date
2022-05-10
Expiration Date
Abstract
A system for measuring a property of a sample is provided. The system comprises a diagnostic measuring device having a memory and a diagnostic test strip for collecting the sample. The strip has embedded thereon a pattern representative of at least first data and second data, the first data being data representing at least one of parameters related to measuring the property, codes usable for calibration of the diagnostic measuring device, or parameters indicating proper connection between the measuring device and the test strip and the second data usable for detecting and rejecting potential errors affecting the proper measurement of the property.
Core Innovation
A diagnostic measuring device receives a code read from a physical arrangement on a diagnostic test strip. The code includes first data representing at least one parameter related to performing a diagnostic test by the device, and the device uses an error detection routine to address potential read errors.
The device determines a probability of one or more bits of the plurality of bits to cause a read error and constructs a logical arrangement of the one or more bits different than the physical arrangement based on the probability. The logical arrangement is arranged such that an impact of potential read errors is minimized, and the logical arrangement is sequential or non-sequential depending on the implementation described.
The disclosed system may also apply an error detection and rejection algorithm to logically arranged code and determine a constituent level of a fluid when an acceptable error is detected or when no error is detected. The disclosed approach can include error correction using Hamming codes and combinations of redundant code, code reduction or valid code set exclusion, checksum or modulus checking, and bit rearrangement using per-bit error probabilities.
Claims Coverage
The provided independent claim family describes one primary inventive concept: minimizing the impact of potential read errors by replacing a physical bit arrangement with a probability-based logical arrangement for a code representing diagnostic test parameters. The dependent claims refine this core concept into specific logical rearrangement rules, including sequential and non-sequential arrangements, and link the logically arranged code to error detection and rejection and to determining a constituent level of a fluid.
Probability-based logical bit rearrangement to minimize read-error impact
Reading a first code comprising a plurality of bits arranged in a physical arrangement, determining a probability of one or more bits of the plurality of bits to cause a read error, and constructing a logical arrangement of the one or more bits different than the physical arrangement based on the probability, where the logical arrangement comprises the one or more bits arranged such that an impact of potential read errors is minimized, and where the first code represents at least one parameter related to performing a diagnostic test by the device.
Swapping highest- and lowest-error-probability bits
Constructing the logical arrangement such that a bit having a highest probability of causing a read error and a bit having a lowest probability of causing a read error are logically swapped.
Sequential logical arrangement maintaining code sequence
Arranging the logical structure in a sequential manner so that the logical arrangement of the one or more bits maintains the code in sequence.
Non-sequential logical arrangement using logical replacements of a code space
Performing a non-sequential logical arrangement where the first code stays in sequence while the code space is logically rearranged using logical replacements, including producing a resulting code space.
Error detection and rejection algorithm tied to acceptable error
Performing an error detection and rejection algorithm on logically arranged code and determining a constituent level of a fluid when an acceptable error is detected or when no error is detected.
Acceptability based on least-significant versus most-significant bit errors
Using a non-sequential arrangement to create an encoded code space that the device treats as acceptable or unacceptable based on whether a test strip code has least significant bit errors versus most significant bit errors.
Across the provided independent claim and its dependent refinements, the central coverage is the construction of a logical bit arrangement different from the physical arrangement using per-bit read-error probabilities to minimize read-error impact, with additional refinements including high- and low-error bit swapping, sequential versus non-sequential arrangement handling, and linking the logically arranged and error-detected code to acceptability and determination of a constituent level of a fluid.
Stated Advantages
Minimizing the impact of potential read errors.
Documented Applications
Performing a diagnostic test by a diagnostic measuring device using parameters represented by an embedded code on a diagnostic test strip.
Determining a constituent level of a fluid based on outcomes of an error detection and rejection algorithm applied to logically arranged code.
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