Graphene FET devices, systems, and methods of using the same for sequencing nucleic acids

Inventors

Hoffman, Paul

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Assignees

Paragraf USA

Member
Paragraf
Paragraf

Paragraf specializes in the development and manufacture of wafer-scale, silicon-compatible graphene electronic devices and sensors. Utilizing a proprietary process for direct, contamination-free graphene synthesis, the company delivers scalable solutions for magnetic field sensing, molecular and biosensing, and advanced electronics integration. These technologies address challenges in cryogenics, quantum computing, automotive, aerospace, environmental monitoring, and healthcare. With a focus on large-scale integration of 2D materials, Paragraf advances next-generation sensors and components for demanding and extreme environments.

Publication Number

US-10607989-B2

Patent

Publication Date

2020-03-31

Expiration Date


Abstract

Provided herein are integrated circuits for use in performing analyte measurements and methods of fabricating the same. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in chemical and/or biological processes, including DNA hybridization and/or sequencing reactions. The methods for fabricating the integrated circuits include steps of depositing an insulating layer on a semiconducting substrate, and forming trenches in the insulating dielectric layer. Conductive material may be deposited in the trenches to form electrodes, and the insulating layer may be conditioned so that the electrodes protrude above the insulating layer. A 2D material, such as graphene, may be deposited on to electrodes to form a channel between the electrodes.

Core Innovation

Provided herein are integrated circuits for use in performing analyte measurements and methods of fabricating the same, wherein such arrays may be employed to detect a presence and/or concentration changes of various analyte types in chemical and/or biological processes, including DNA hybridization and/or sequencing reactions. The methods for fabricating the integrated circuits include steps of depositing an insulating layer on a semi-conducting substrate, forming trenches in the insulating dielectric layer, depositing conductive material in the trenches to form electrodes, conditioning the insulating layer so that the electrodes protrude above the insulating layer, and depositing a 2D material, such as graphene, onto electrodes to form a channel between the electrodes.

The disclosure addresses limitations of existing sequencing detector approaches by providing field effect transistor sensors, arrays, and integrated circuits fabricated using CMOS processing techniques with improved FET sensor and array designs to increase measurement sensitivity and accuracy and facilitate significantly small sensor sizes and dense gFET sensor based arrays. The background identifies needs for low-cost, high-throughput sequencing and notes that conventional ISFET/MOSFET biosensors suffer from lack of sensor sensitivity and signal to noise characteristics as transistor geometries scale, motivating FET devices with very thin vertical channels and 1D or 2D reaction layers to allow shorter gates and enhanced sensor sensitivity for biological applications such as nucleic acid sequencing.

Claims Coverage

Independent claims 1, 11, and 16 define methods for forming integrated circuits and securing electrodes for use in nucleic acid sequencing and analyte sensing. The claims recite six principal inventive features related to substrate and dielectric preparation, trenched electrodes forming channel regions, conditioning/elevating electrode surfaces, deposition and patterning of 2D material channels, openings in 2D material with conductive fills, and methods for securing electrodes to 2D layers.

Semi-conducting substrate with extended planar surfaces

providing a semi-conducting substrate comprising a plurality of extended planar surfaces offset from one another by a first thickness, being defined by a plurality of side members, and having one or more transistor elements positioned between the plurality of surfaces

Trenched electrodes forming channel region

forming a plurality of trenches in the first insulating dielectric layer, each trench offset from the other by a distance, the distance forming a channel region; depositing a first layer of conductive material into each of the trenches to form a plurality of electrodes therein, a first electrode serving as a source electrode, and a second electrode serving as a drain electrode

Conditioning dielectric so electrodes project above surface

conditioning the first insulating dielectric layer in a manner so that a side and top surface of each of the plurality of electrodes extends above a surface of the first insulating dielectric layer

2D material layer spanning electrodes to form channel

depositing a 2D material layer onto the side and top surface of each of the plurality of electrodes and across the channel region to thereby form a channel between the electrodes

Openings in 2D material to expose electrode tops

forming an opening in the 2D material proximate each electrode so as to expose at least the top surface of each electrode

Conductive fill contacting electrodes through 2D openings

depositing a second layer of conductive material over each opening of the 2D material layer so that the second layer of conductive material contacts at least the top surface of the electrode, fills the opening, and further extends above the 2D material layer so as to contact a side and top surface of the 2D material layer

Electrodes projecting above dielectric prior to 2D deposition

preparing a plurality of electrodes within the first insulating dielectric layer, each of the plurality of electrodes having a dimension even with or projecting above the top surface of the first insulating dielectric surface

Patterning 2D material to form channels contacting electrodes

depositing a 2D material layer on the plurality of electrodes to form a contact between the electrodes and the 2D material layer; and patterning the 2D material layer to form at least one channel contacting an electrode on each of the ends of the channel

The independent claims focus on (1) forming trenched source and drain electrodes in an insulating dielectric over a semiconductor substrate, (2) conditioning the dielectric so electrodes project above the surface, (3) depositing and patterning a 2D material layer to form channels between those electrodes, and (4) creating openings in the 2D layer and filling them with conductive material to enhance electrode–2D material contact.

Stated Advantages

Increase measurement sensitivity and accuracy of the sensor and associated arrays.

Facilitate significantly small sensor sizes and dense gFET sensor based arrays.

Provide for rapid data acquisition from small sensors to large, including dense arrays of sensors.

Allow smaller sensor configurations, therefore smaller channels and/or gates, enabling a greater density of sensors and/or arrays.

Documented Applications

Detecting the presence and/or concentration changes of various analyte types in chemical and/or biological processes, including DNA hybridization and/or sequencing reactions.

Use in genomics and bioinformatics analysis, including whole genome analysis, genome typing analysis, micro-array analysis, panels analysis, exome analysis, micro-biome analysis, and clinical analysis.

Clinical analyses such as cancer analysis, non-invasive prenatal testing (NIPT) analysis, and UCS analysis as explicitly listed among clinical applications.

Integrated circuits and sensor arrays for performing nucleic acid sequencing reactions and detecting binding events or changes in ion concentration (e.g., pH) within solution-gated wells.

Positioning and verification of microbeads or nanobeads within wells or reaction locations for biological or chemical analysis (e.g., sequencing) using electric and/or magnetic field components to draw or eject beads.

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