Error detection and rejection for a diagnostic testing system
Inventors
Modzelewski, Brent E. • Kayihan, Ferhan • Cardello, Edward
Assignees
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Publication Number
US-10013297-B2
Publication Date
2018-07-03
Expiration Date
Abstract
A system for measuring a property of a sample is provided. The system comprises a diagnostic measuring device having a memory and a diagnostic test strip for collecting the sample. The strip has embedded thereon a pattern representative of at least first data and second data, the first data being data representing at least one of parameters related to measuring the property, codes usable for calibration of the diagnostic measuring device, or parameters indicating proper connection between the measuring device and the test strip and the second data usable for detecting and rejecting potential errors affecting the proper measurement of the property.
Core Innovation
The invention relates to a diagnostic measuring device and diagnostic test strip in which information is embedded on the strip as a first code comprising a plurality of bits arranged in a physical arrangement. The diagnostic device reads the plurality of bits from the first code and uses the embedded information as calibration and/or test-identification information, including embedded sample/manufacturing code and calibration coefficients, to validate the strip prior to sample measurement.
A controller performs an error detection routine by reading the plurality of bits of the first code and determining a probability of each bit to cause a read error in the first code. The controller constructs a logical arrangement of the bits different than the physical arrangement based on the probability so that the impact of potential read errors is minimized, and then performs an error detection and rejection algorithm on the logically arranged code.
The document also describes error detection and rejection using multiple schemes, including a trending-based detection of anomalous read codes, checksum schemes including modulus, parity, and multi-bit checksums, redundant codes encoded with different bit sequence or encoding method, selective code-space reduction by excluding high-error code values to meet an acceptable rejection level, and a logical bit reordering arrangement that maps higher-error bits to less significant logical positions via sequential or non-sequential reading. Optional error correction using Hamming codes is also discussed, including combinations of these methods.
Claims Coverage
The partial content provides one independent claim. Across the independent claim, the error detection routine centers on estimating per-bit read-error likelihoods, constructing a logical bit ordering different from the physical arrangement to minimize the impact of read errors, and then applying an error detection and rejection algorithm prior to determining constituent level.
Logical arrangement of bits to minimize impact of read errors
Reading the plurality of bits of the first code; determining a probability of each bit to cause a read error; constructing a logical arrangement of the bits different than the physical arrangement based on the probability such that the impact of potential read errors is minimized; performing an error detection and rejection algorithm on the logically arranged code; and determining the constituent level of the sample fluid if the error detection and rejection algorithm detects an acceptable error or does not detect an error in the logically arranged code.
Bit probability estimation and error detection routine for acceptable errors
Determining a probability of each bit to cause a read error in the first code, and using the resulting logically arranged code to perform an error detection and rejection algorithm that either detects an acceptable error or detects no error before determining the constituent level of the sample fluid.
Sequential or non-sequential logical arrangement reading constraint
Constraining the logically arranged code such that it is sequentially read, or alternatively constraining the logically arranged code such that it is not read in sequence.
The independent claim coverage is grounded in constructing a logically arranged code that reorders physically arranged bits based on per-bit read-error probabilities to minimize the impact of read errors, followed by an error detection and rejection algorithm whose output gates determining the constituent level.
Stated Advantages
Minimizes the impact of potential read errors by arranging bits logically different than the physical arrangement based on probability.
Enables determining the constituent level of the sample fluid when the error detection and rejection algorithm detects an acceptable error or does not detect an error.
Documented Applications
Measuring a property of a sample fluid using a diagnostic measuring device that receives a diagnostic test strip having embedded information including a first code, with determination of constituent level based on error detection and rejection.
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